STM32F429ZGT6 vs STM32H743VIT6: Cortex-M4 or Cortex-M7 for a New BOM?

Quick answer: STM32F429ZGT6 and STM32H743VIT6 are choices for different MCU designs, not drop-in alternatives. The F429 part combines a Cortex-M4, 1 Mbyte of flash and a 144-pin package; the H743 part has a Cortex-M7, 2 Mbytes of flash and a smaller 100-pin package. The H743 offers more processing headroom, but its exact package omits SDRAM support. Start with pins, memory architecture and software effort before comparing headline clock speeds.

For a new BOM, shortlist the F429 when a measured workload fits its resources and the 144-pin allocation serves the board. Evaluate the H743 when the application justifies its extra compute or memory resources and the team can qualify a new board and software configuration. These are decision criteria, not a claim that either device has passed your application tests.

Cover image: AI-generated concept illustration of generic development boards. It does not show the actual devices, their exact pin counts or a verified reference circuit.

Compare the exact ordering codes—not the whole families

Sources: ST’s STM32F427/429 datasheet, DS9405 Rev 13 and STM32H742/743 datasheet, DS12110 Rev 11, including ordering information and package-specific feature tables. The exact commercial records are STM32F429ZGT6 at ST and STM32H743VIT6 at ST. Sources checked September 12, 2026.

The F429 family datasheet covers several flash densities: its “up to 2 Mbytes” headline must not be assigned to STM32F429ZGT6, whose G code denotes 1 Mbyte. Likewise, the V in STM32H743VIT6 identifies 100 pins; it is not evidence that a delivered chip is silicon revision V. Obtain the actual revision separately.

Package and external memory can decide the choice

These two packages have different pin counts and body sizes. Replacing one on an existing PCB is therefore not a footprint-preserving substitution. Review the schematic and board as a redesign, including power pins, decoupling, reset, oscillator connections, debug access and each required alternate function.

A particularly important limit is easy to miss: DS12110 states that SDRAM is not available on its LQFP100 or TFBGA100 packages. That applies to the LQFP100 STM32H743VIT6 discussed here. Do not select it for a parallel-SDRAM design simply because an H743 family overview mentions an external memory controller.

For an application with a display buffer, write down where every buffer will live and how the display path reaches it. If the design depends on external SDRAM, this exact H743 ordering code fails that requirement. Reopen the package or memory-architecture decision; do not quietly swap in an unnamed H743 variant. The F429 candidate still needs a complete pin-allocation review before it can be accepted.

Where serial NOR flash is part of the design, evaluate the host interface and flash together. Our W25Q64JV/W25Q128JV selection guide explains density and STR/DTR review. It is not proof that a particular MCU boot path or board supports those flash parts.

180 MHz vs 480 MHz is not an application benchmark

The ratio of the two maximum clock figures does not tell you the speed-up of your firmware. Before moving a BOM to the H743, identify the actual constraint: CPU time, memory access, interrupt latency, peripheral transfer time or a combination. Measure representative tasks on the intended software configuration, not an empty loop with unrelated compiler settings.

For the H743’s 480 MHz configuration, DS12110 ties the maximum to revision V. Its revision-V operating table specifies VOS0, requires the internal LDO to be on for that voltage-scaling level and applies a 105°C maximum junction-temperature condition to the highest clock setting. The ordinary T6 ambient grade is not permission to ignore those operating conditions. Check the delivered revision, voltage scaling, clock tree and thermal budget together.

A useful acceptance record includes firmware revision, compiler options, clock configuration, memory placement, worst observed task time and the intended acceptance limit. Also record power and thermal behavior during the real workload. A faster CPU is not a substitute for that evidence, and no performance or power measurement is claimed in this article.

Software migration: memory, DMA and boot are separate work items

Changing the device selection in a project is a starting point, not a completed port. Rebuild the clock and peripheral configuration for the exact target, inspect the startup and linker settings, and review any code that assumes a particular register layout or memory address.

The H743 has multiple RAM regions rather than one interchangeable pool. Allocate code, stacks, DMA buffers and retained data deliberately; verify that the selected bus master can access the chosen memory. A build that links successfully can still place a buffer where the required transfer path cannot use it.

Cached memory adds another review item. ST’s AN4839 guidance on cache and data coherency explains why CPU and DMA views of shared data require an explicit policy. Review appropriate cache maintenance or memory attributes with the firmware team. Do not apply a blanket “disable all cache” workaround and assume the performance target remains satisfied.

Validate the production boot and update route without a debugger attached. Include first programming, normal restart, reset recovery, update interruption and the intended protection settings. Recheck the applicable reference manual, current device errata and programmer support for the actual silicon revision before release. A passing development-board demonstration does not qualify the production board or lot.

Three requirement-led selection scenarios

These examples are hypothetical review situations, not customer case studies or tested outcomes.

Keep commercial urgency from collapsing these gates. If the original device is hard to source, obtain a separate availability response while engineering evaluates alternatives. For a formally discontinued BOM line, use the EOL decision framework; difficulty obtaining a quote is not itself an EOL notice.

RFQ checklist: separate exact-part sourcing from an alternate request

ST’s exact-part product records list both devices as Active when checked. That is a dated manufacturer status, not a guarantee of your requested quantity, price, delivery date or future availability. Preserve the source and check again when committing to a purchase.

Send the complete MPN, required quantity, delivery destination, packing requirement and any revision constraint. If the supplier proposes a different suffix, package or device, require it to be quoted as a separate candidate. Do not let “STM32 equivalent” become the accepted line description.

Requested full MPN / offered full MPN:
Exact package and packing requirement:
Quantity / destination / required delivery date:
Lot and date-code information offered:
Silicon revision requirement / evidence available:
Manufacturer status source and check date:
Traceability and inspection records available / missing:
Required external memory and pin-allocation record:
Firmware, programmer and test configuration:
Engineering approval owner / outstanding tests:
Commercial terms / quote validity / approval owner:

Use the OEM/EMS BOM sourcing process for ownership and approval flow, and the component quotation checklist for commercial comparison. A manufacturer record supports device identification; it does not validate the provenance of a particular shipment.

Frequently asked questions

Is STM32H743VIT6 a direct replacement for STM32F429ZGT6?

No. The exact packages are LQFP100 and LQFP144, respectively, and the processor, memory architecture and software configuration differ. Treat a transition as a new design and qualification project.

Does every STM32H743VIT6 run at 480 MHz?

Do not infer that from the orderable name alone. The maximum requires the applicable silicon revision and datasheet operating conditions. The V character in the ordering code denotes pin count, not proof of silicon revision.

Can this 100-pin H743 drive external SDRAM?

Not through an SDRAM interface provided by this package: ST specifically excludes SDRAM on LQFP100. Resolve a design that requires it before approving this ordering code.

Can existing firmware be reused unchanged?

Do not assume so. Application logic may be reusable, but startup, clocks, pin assignments, drivers, memory placement, cache/DMA behavior and the production boot/update path require review and testing.

Exact catalog pages and the next step

Review our STM32F429ZGT6 catalog page and STM32H743VIT6 catalog page, then send a component sourcing inquiry with the completed record. Ask for current commercial evidence separately from technical qualification. Neither a catalog listing nor this comparison establishes inventory, authenticity, pin compatibility or application approval.